1. Field of the Invention
The present invention relates to a small-sized liquid crystal display panel, and more particularly, to a small-sized liquid crystal display panel free from gap irregularity in an image display section.
2. Description of the Related Art
A patent application was filed in Japan for the construction of a liquid crystal display panel on Feb. 8, 2002 and published on Dec. 4, 2002 (JP. 2002-350892A). Further, its corresponding U.S. patent application was filed on May 9, 2002 and published as 2002/0154263 A1 on Oct. 24, 2002. This related art will now be described with reference to FIGS. 7 to 12.
As shown in FIGS. 7 and 8, an upper transparent substrate 2 and a lower transparent substrate 4 are formed of a glass substrate each, and are bonded to each other by means of a seal portion 16. A region that is surrounded by the substrates 2 and 4 and the seal portion 16 is filled with a liquid crystal material. Electrode wire groups (not shown in FIGS. 7 and 8) are formed individually on the lower surface of the upper transparent substrate 2 and the upper surface of the lower transparent substrate 4. Further, an electrode drive IC 12 that outputs signals for driving the electrode wire groups is provided directly on the upper transparent substrate 2 by chip-on-glass mounting. Necessary signals for the electrode drive IC 12 are externally transmitted through a flexible printed circuit 50 that is bonded to the upper transparent substrate 2 with an anisotropic conductive film.
FIG. 9 shows the electrode wire groups that are arranged on the upper and lower transparent substrates 2 and 4. In FIG. 9, full lines represent electrode wire groups 66, 54 and 56 on the upper transparent substrate 2, and two-dot chain lines represent electrode wire groups 62 and 64 on the lower transparent substrate 4. The electrode wire group 66, among the electrode wire groups 66, 54 and 56 on the upper transparent substrate 2, includes signal electrode wires, while the electrode wire groups 54 and 56 include connecting wires. On the other hand, both the electrode wire groups 62 and 64 on the lower transparent substrate 4 include scanning electrode wires. Numeral 52 denotes the contour of the upper substrate 2.
As shown in FIG. 9, the signal electrode wires 66 are connected directly to the electrode drive IC 12 on the upper transparent substrate 2. The scanning electrode wires 62 that cover the upper half of a display screen are connected to the electrode drive IC 12 through the connecting wires 54 on the right-hand side of the screen. The scanning electrode wires 64 that cover the lower half of the display screen are connected to the electrode drive IC 12 through the connecting wires 56 on the left-hand side of the screen. The connecting wires 54 on the right-hand side of the display screen and the scanning electrode wires 62 on the upper half of the screen are connected by means of a terminal area 58 in the seal portion 16. The connecting wires 56 on the left-hand side of the display screen and the scanning electrode wires 64 on the lower half of the screen are connected by means of a terminal area 60 in the seal portion 16. An anisotropic conductive sealant (hereinafter referred to as ACS) that is doped with conductive particles is used for the seal portion 16.
As shown in FIG. 9, the electrode drive IC 12 is mounted on one side (upper side) of the rectangular upper substrate 2, while the connecting wires 54 and 56 are located individually on two opposite sides (right- and left-hand sides) that extend at right angles to the one side on which the IC 12 is mounted.
A region in which the signal electrode wires 66 on the upper transparent substrate 2 and the scanning electrode wires 62 and 64 on the lower transparent substrate 4 cross one another forms an image display section 18. A point of intersection of each signal electrode wire 66 and each of the scanning electrode wires 62 and 64 constitutes one pixel.
Normal liquid crystal display cannot be enjoyed in a region that ranges from the seal portion 16 of the liquid crystal display panel to the vicinity of the inside of the seal portion 16. Accordingly, a certain gap, i.e., a image non-display section 20, should be provided between the image display section 18 and the seal portion 16 lest the seal portion 16 be seen if the display panel is viewed diagonally. In order to downsize the liquid crystal display panel, therefore, the connecting wires 54 and 56 are laid in the image non-display section 20.
In order to lay the numerous connecting wires 54 and 56 in the narrow image non-display section 20, each of the connecting wires 54 and 56 must be narrowed considerably. Normally, each pixel is a square each side of which is about 200 to 300 μm long, so that each of the scanning electrode wires 62 and 66 has a width of 200 to 300 μm. In order to lay the connecting wires 54 and 56 in the image non-display section 20, however, the width of each of them must be restricted to about one tenth of that of each of the scanning electrode wires 62 and 66, that is, to 20 to 30 μm. If the width of each connecting wire is reduced in this manner, its resistance increases inevitably. As the liquid crystal is driven, therefore, a problem of picture deterioration is aroused such that signals applied to liquid crystal pixels become dull to increase cross talk.
To solve this problem of picture deterioration, the film thickness of each electrode may be increased or a low-reflection metal layer, such as a chromium layer, may be applied to each connecting wire. Normally, a transparent indium-tin oxide (hereinafter referred to as ITO) layer is used for an electrode wire and may be thickened. Alternatively, the connecting wire may be formed having a laminate structure of ITO and low-reflection chromium in a manner such that an ITO layer of about 0.2-μm thickness is applied to a low-reflection chromium layer of about 0.3-μm thickness that is previously formed on the surface of a transparent substrate. Since the sheet resistance of the low-reflection chromium layer of 0.3-μm thickness is about one tenth of that of the ITO layer of 0.2-μm thickness, the chromium layer has a great function to lower the resistance of the connecting wire.
If the connecting wires 54 and 56 that are formed of a two-layer structure of ITO and low-reflection chromium are used, the low-reflection chromium forms a shielding layer. If the liquid crystal pixels at the points of intersection of the connecting wires 54 and 56 and the scanning electrode wires 62 and 64 are lit unexpectedly, therefore, they cannot be seen from above. This is another effect for improvement.
FIG. 10 is an enlarged view for illustrating a configuration near the terminal area 58 that connects the connecting wire 54 on the right-hand side of the display screen shown in FIG. 9 and the scanning electrode wire 62 on the upper half of the screen. As shown in FIG. 10, an end portion of the connecting wire 54 is extended to the seal portion 16 and forms the terminal area 58. In the terminal area 58, the connecting wire 54 is connected electrically to the scanning electrode wire 62 by means of the ACS. In FIG. 10, a hatched portion of the connecting wire 54 is a region in which a low-reflection chromium layer is attached to an ITO layer. As mentioned before, the resistance of the connecting wire 54 can be lowered by attaching the low-reflection chromium layer to the ITO layer. The region of the connecting wire 54 in which the low-reflection chromium layer is attached to the ITO layer may be restricted to the portion in the image non-display section 20 or may be designed to include the terminal area 58 as well as the portion in the image non-display section 20.
FIG. 11 shows the region of the connecting wire in which the low-reflection chromium layer is attached to the ITO layer. As indicated by hatching in FIG. 11, the low-reflection chromium layer is attached to each of regions 70 and 72 that cover the connecting wires 54 and 56.
According to the related art described above, the resistance of the connecting wire is lowered to prevent picture deterioration by adding the low-reflection chromium layer to the ITO layer of the connecting wire. However, a new problem is aroused. This problem will be described with reference to 12.
FIG. 12 is a sectional view taken along line A–A′ of FIG. 11. On the lower transparent substrate 4, as shown in FIG. 12, color filter layer 24 of red (R), green (G), and blue (B) are formed repeatedly in the image display section 18. Further, a shielding layer 74 of black resin is formed in the image non-display section 20. It is as thick as the color filter layer 24. The scanning electrode wires 62 are formed on the color filter layer 24 and the shielding layer 74. If an auxiliary light source (not shown) is provided on the lower surface of the lower transparent substrate 4, the shielding layer 74 serves to prevent leakage of light from the image non-display section 20.
On the upper transparent substrate 2, on the other hand, the signal electrode wires 66 are formed in the image display section 18, and the connecting wires 54 are formed in the image non-display section 20. Each connecting wire 54 is a laminate structure of an ITO layer and a low-reflection chromium layer 22. The low-reflection chromium layer 22 is situated on the side of the upper transparent substrate 2. The ITO layer of the connecting wire 54 extends to the seal portion 16 and forms the terminal area 58.
A region that is surrounded by the upper transparent substrate 2, lower transparent substrate 4, and seal portion 16 forms a liquid crystal layer 10. In order to provide an accurate gap tl2 for the liquid crystal layer 10, spacers 32 and 34 of the same diameter for the image display section 18 and the image non-display section 20 are arranged in the layer 10.
The problem lies in the thickness of each connecting wire 54 in which the low-reflection chromium layer 22 is attached to the ITO layer. Normally, the respective ITO layers of each scanning electrode wire 62, signal electrode wire 66, and connecting wire 54 are about 0.2 μm thick. Further, the thickness of the low-reflection chromium layer attached to the ITO layer of the connecting wire 54 is set to about 0.3 μm. Thereupon, the thickness of the connecting wire formed in the image non-display section 20 on the upper transparent substrate 2 is greater than that of the signal electrode wire 66 formed in the image display section 18 on the substrate 2 by a margin corresponding to the thickness of the low-reflection chromium layer 22, i.e., by about 0.3 μm.
If the spacers 32 and 34 in the liquid crystal layer 10 for the image display section 18 and the image non-display section 20 have the same diameter, a gap tl3 between the upper and lower transparent substrates 2 and 4 in the image non-display section 20 is greater than a gap tl4 between the substrates 2 and 4 in the image display section 18 by a margin corresponding to the thickness (0.3 μm) of the low-reflection chromium layer 22, as shown in FIG. 12.
Since the upper transparent substrate 2 is formed of a hard glass substrate, a part of the image display section 18 of the substrate 2, which adjoins the image non-display section 20, gradually widens the distance from the lower transparent substrate 4 as the image non-display section 20 is approached. In consequence, the spacers 32 fail to function on that part of the upper transparent substrate 2, so that the liquid crystal layer 10 is subject to gap irregularity. In an STN liquid crystal, gap irregularity that exceeds 0.1 μm is visually recognized as failure in display. Therefore, gap irregularity of 0.3 μm inevitably causes non-negligible deterioration of display.
Described in a Japanese patent document, JP 2002-189227 A (especially in FIGS. 17 to 19), is a solution to the problem of the liquid crystal display panel described above. According to this method, connecting wires (wiring patterns) are formed of highly conductive metal, such as aluminum, so that the resistance can be prevented from increasing as the connecting wires are laid in the image non-display section and narrowed. In this case, each connecting wire of aluminum is made as thick as the ITO layer of each signal electrode wire, so that the gap between the upper and lower substrates is uniform in an area ranging from the image display section to the image non-display section. Thus, unevenness in display is prevented. However, restriction of the thickness of each connecting wire of aluminum to that of the ITO layer of each signal electrode wire will prevent lowering the resistance by increasing the thickness of the connecting wire.
If the resistance of each connecting wire is lowered by attaching the low-reflection chromium layer of chromium or the like to the connecting wire, in order to prevent picture deterioration by cross talk, as described above, the gap irregularity of the liquid crystal layer inevitably causes deterioration in display. This gap irregularity may possibly be eliminated by forming the connecting wire from a thin, highly conductive metal sheet. If this is done, however, the thinness of the wire inevitably cancels the function of the metallic material to lower the resistance.